On the capacity of relay networks with finite memory relays

Thesis (Sc. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.Includes bibliographical references (p. 125-132).(cont.) the length of relay memory and the number of relay stages.In this thesis, we examine the effect of relay memory on the capacity of two types of relay channels. In the first part of the thesis, we present a parallel relay channel model. Under this particular model, intermediate processing at the relays is distributed and cooperative. We derive the capacity by making use of the direct relation between capacity and estimation theory. We show that the capacity of the channel under distributed relay processing by a Kalman filter and that of the channel under optimal relay processing are equal. Using a one dimensional (1D) Kalman filter, processing at individual relays requires infinite memory, assuming that the channel is subject to inter-symbol interference (ISI). For a channel with ISI, we show that a two dimensional (2D) Kalman filter allows the memory for processing at individual relays to be finite. In the second part of the thesis, we present a serial relay channel model. Under this particular model, one section of the channel is coupled with the next by a memoryless relay. Assuming the channel is subject to energy constraints and finite end-to-end noise power, we show that the capacity tends to infinity asymptotically in the number of relay stages. Given a finite number of relay stages, finding maximum mutual information subject to energy constraints alone is difficult. Thus, in addition to energy constraints, we propose entropy constraints. We give an explicit upper bound to capacity, assuming the channel is subject to the proposed set of constraints on the channel input as well as the relay outputs. We illustrate the use of our upper bound numerically and contrast it versus several lower bounds. Next, we relax the memoryless restriction, thus allow coding and decoding at the relays. We show two trade-offs concerningby Nathanael Peranginangin.Sc.D

Integrating best-effort and guaranteed sessions through a two-level generalized processor sharing approach

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.Includes bibliographical references (leaf 72).This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.by Nathanael Peranginangin.S.M